Download e-book for kindle: Architecture Exploration of FPGA Based Accelerators for by B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan

By B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan

This publication provides an assessment method to layout destiny FPGA materials incorporating not easy embedded blocks (HEBs) to speed up functions. this system could be necessary for collection of blocks to be embedded into the material and for comparing the functionality achieve that may be accomplished by way of such an embedding. The authors illustrate using their technique through learning the impression of HEBs on vital bioinformatics functions: protein docking and genome meeting. The e-book additionally explains how the respective HEBs are designed and the way implementation of the appliance is completed utilizing those HEBs. It exhibits that major speedups will be completed over natural software program implementations through the use of such FPGA-based accelerators. The method offered during this booklet can also be used for designing HEBs for accelerating software program implementations in different domain names along with bioinformatics. This publication will end up precious to scholars, researchers, and working towards engineers alike.

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Extra resources for Architecture Exploration of FPGA Based Accelerators for BioInformatics Applications

Example text

The various parameters that effect the design like the number of HEBs and the bandwidth requirement for using the HEBs efficiently is analyzed. The methodology to evaluate HEBs in FPGAs Fig. 2 Methodology to design hard embedded blocks in FPGA in the context of FPGA-based accelerators 36 3 Methodology for Implementing Accelerators for accelerating an application is shown in Fig. 2. The flow diagram on the left depicts the generic flow for accelerating applications using FPGAs. The flow diagram on the right shows the corresponding flow for design and evaluation of HEBs in FPGAs.

In our present methodology, we have not considered power as a parameter but is part of our future work. The profile data of the application which has to be accelerated is generated and the data access patterns are analyzed for the inputs to the HEBs. There can be many ways to implement the application using the HEBs. This also depends on the amount of concurrency and pipelining stages achievable including overlap of I/O and computation time. This essentially corresponds to the FPGA architecture constrained design space to be explored using the selected HEBs.

Docking and scoring in virtual screening for drug discovery: methods and applications. Nat. Rev. Drug Discov. 3(11), 935–949 (2004) 48. : Next-generation massively parallel short-read mapping on FPGAs. In: IEEE International Conference on ASAP, pp. 195–201 (2011) 49. : PIPER: an FFT-based protein docking program with pairwise potentials. Proteins (2006) 50. : Measuring the gap between FPGAs and ASICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(2), 203–215 (2007) 51. : Area and delay trade-offs in the circuit and architecture design of FPGAs.

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